Apparatus and method for implementing viterbi butterflies
US6257756A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1997 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | Jul 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6569
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The Viterbi algorithm (20) is performed with a reduced number of calculations when the comparing step (C, 80, 50) is anticipated before the selecting (S, 62, 64, 66, 68) and adding steps (A, 74, 76). During comparing (C), selection decisions (e.g., D (i)) are obtained by analyzing pairs of old path metrics (e.g., P (2i, j-1) at 91, P (2i+1, j-1) at 92) by subtracting and multiplying the path metrics with branch metrics (e.g., B (i, j) at 95) and combining intermediate sign (e.g., SP, SB, S.DELTA.) by e.g., and-logic (50). Selecting decisions (e.g., D (i/2, j+1), D (i/2+N/2, j+1) and new path metrics (e.g., P (i, j), P (i+12, j) are continuously stored and updated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.