Michael Zarubinsky
25Patents
7h-index
34Co-inventors
69Inventor score
Filing activity: Jul 16, 1997 → Jun 28, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6380811B1 | Signal generator, and method | Electricity | 61 | Expired |
| US5889482A | Analog-to-digital converter using dither and method for converting analog signals to digital signals | Electricity | 32 | Expired |
| US6208211A | Low jitter phase locked loop having a sigma delta modulator and a method thereof | Electricity | 28 | Expired |
| US6257756A | Apparatus and method for implementing viterbi butterflies | Electricity | 27 | Expired |
| US5903232A | Apparatus and method for sampling rate conversion with rational factors | Electricity | 22 | Expired |
| US6313774A | Delta-sigma analog-to-digital converter, and method | Electricity | 16 | Expired |
| US6028544A | Digital-to-analog converter with noiseshaping modulator, commutator and plurality of unit converters, and method | Electricity | 11 | Expired |
| US6570947B1 | Phase lock loop having a robust bandwidth and a calibration method thereof | Electricity | 7 | Expired |
| US6204783A | Digital to analog convertor having a DC offset cancelling device and a method thereof | Electricity | 7 | Expired |
| US8532424B2 | Method and system for filtering image data | Electricity | 6 | Active |
| US6181168A | High speed phase detector and a method for detecting phase difference | Electricity | 4 | Expired |
| US8102399B2 | Method and device for processing image data stored in a frame buffer | Physics | 4 | Active |
| US6683926B2 | Gain controller with comparator offset compensation for circuit having in-phase and quadrature channels | Electricity | 3 | Expired |
| US7738563B2 | Method and system for performing deblocking filtering | Electricity | 2 | Active |
| US6671336B1 | Gain controller for circuit having in-phase and quadrature channels, and method | Electricity | 1 | Expired |
| US11082135B2 | Apparatus and method for processing a digital signal in a frequency domain linear equalizer | Electricity | 0 | Active |
| US8462818B2 | Method for processing CDMA signals and a device having CDMA signal capabilities | Electricity | 0 | Active |
| US10102828B2 | Method and apparatus for adaptive graphics compression and display buffer switching | Physics | 0 | Active |
| US8526756B2 | Method and system arranged for filtering an image | Physics | 0 | Active |
| US11750219B2 | Decoding method, decoder, and decoding apparatus | Electricity | 0 | Active |
| US8345155B2 | Integrated circuit comprising deflicker unit for filtering image data, and a method therefor | Electricity | 0 | Active |
| US8614719B2 | Method for gamma correction and a device having gamma correction capabilities | Electricity | 0 | Active |
| US9948928B2 | Method and apparatus for encoding an image | Electricity | 0 | Active |
| US8077698B2 | Method and device for frame and slot synchronization | Electricity | 0 | Active |
| US8456529B2 | Device and method for evaluating connectivity between a video driver and a display | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.