Method analyzing a semiconductor surface using line width metrology with auto-correlation operation
US6258610A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 1999 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | Jul 2, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for analyzing a semiconductor surface having patterned features on the surface is disclosed. At least one patterned feature is scanned to produce a scanned waveform signal having signal segments corresponding to characteristic surface portions of the patterned feature. The signal segments are processed using an auto-correlation function to produce an auto-correlation signal for each characteristic surface portion of the patterned feature. A reference signal having signal segments corresponding to characteristic surface portions of a known patterned feature is provided and each segment of the auto-correlation signal is compared to the respective signal segments of the reference signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.