Embedded vertical DRAM cells and dual workfunction logic gates

US6258659A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Ulrike Gruening · Wappingers Falls, US
• Ramachandra Divakaruni · Ossining, US
• Jack A. Mandelman · Stormville, US
• Thomas Rupp · Stormville, US

Key dates

• Filing date: Nov 29, 2000
• Grant date: Jul 10, 2001
• Expiry date: Nov 29, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/488

Abstract

A process for producing very high-density embedded DRAM/very high-performance logic structures comprising fabricating vertical MOSFET DRAM cells with salicided source/drain and gate conductor dual workfunction MOSFETs in the supports.