Semiconductor device having multilayered gate electrode and impurity regions overlapping therewith
US6259138A · kind A · utility
128Cited by
9References
18Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Dec 16, 1999 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | Dec 16, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6721
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A semiconductor device using a TFT including a multilayered gate electrode and an LDD region partially overlapping with the multilayered gate electrode via a gate insulating film is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.