Patent · US Expired

Unified test system and method for testing printed circuit boards

US6259265A · kind A · utility

17Cited by
21References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 13, 1999
Grant dateJul 10, 2001
Priority date
Expiry dateOct 13, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R1/07314
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A unified test system for testing the performance of a printed circuit board assembly, and a test method using the same. A masking board and a printed circuit board assembly are loaded onto a pin board from which test process connection pins having different height project. The test process connection pins, a power input connector and a signal interface connector are connected with the printed circuit board assembly and pins installed on the printed circuit board assembly. Thereafter, in-circuit-test signals are generated to test the printed circuit board assembly. Only function-circuit-test connection pins among the test process connection pins are connected with the printed circuit board assembly, and functions between the printed circuit board assembly and a head disk assembly are tested. Finally, results of the in-circuit-test process and the function-circuit-test process are displayed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.