Capacitive compensation circuit for the regulation of the word line reading voltage in non-volatile memories
US6259632A · kind A · utility
73Cited by
7References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2000 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | Jan 19, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuit for the regulation of the word line voltage in a memory, including a voltage regulator suitable to generate an output regulated voltage to be supplied to one or more word lines of the memory when said one or more word lines are being selected, and charge accumulation means that are selectively connectable with the output of the voltage regulator and suitable to accumulate a compensation charge for a voltage drop that takes place on said regulated voltage upon the selection of said one or more word lines of the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.