Capacitive boosting circuit for the regulation of the word line reading voltage in non-volatile memories
US6259635A · kind A · utility
132Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2000 |
| Grant date | Jul 10, 2001 |
| Priority date | — |
| Expiry date | Jan 19, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for the regulation of the word line voltage in a memory, comprising a voltage regulator suitable to generate an output regulated voltage to be supplied to one or more word lines of the memory when the one or more word lines are being selected. The circuit includes a voltage boosting circuit that is coupled to the output of said voltage regulator and that can be activated upon the selection of one or more memory word lines in order to boost the regulated voltage upon the selection of the one or more memory word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.