Use of palladium immersion deposition to selectively initiate electroless plating on Ti and W alloys for wafer fabrication
US6261637A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 15, 1995 |
| Grant date | Jul 17, 2001 |
| Priority date | — |
| Expiry date | Dec 15, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76879
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for making integrated circuit wafers wherein the wafer has vias or other openings in the wafer which openings have a barrier/adhesion or other metal layer which is metallized to form the circuit comprising activating the metal layer and then sensitizing the metallic layer using a sensitizing displacement composition comprising preferably an alkaline palladium non-ammonia nitrogen (ethylene diamine) complex which is contacted with the wafer at a specially controlled pH. The wafer is activated using an activation solution which contains a complexing agent for any dissolved metal. The sensitizing solution also preferably contains a complexing agent for dissolved metal and preferably contains a second complexing agent such as EDTA to solubilize base metal contaminants.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.