Intra-chip AC isolation of RF passive components
US6261892A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 4, 2000 |
| Grant date | Jul 17, 2001 |
| Priority date | — |
| Expiry date | Oct 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an integrated circuit having active components, conductors and isolation regions on a substrate is disclosed, including forming a portion of at least one of the isolation regions to expose a first area of the substrate, depositing a mask layer over the integrated circuit including the first area, forming the mask layer to expose a second area of the substrate within the first area, converting a portion of the substrate to a selectively etchable material, where the selectively etchable material lies in an area subjacent to the second area and extends only partially to the bottom surface of the substrate, selectively etching the selectively etchable material to form a void, removing the mask layer to expose the isolation region, depositing a conductive layer over all exposed surfaces of the substrate comprising the void and the isolation region, depositing a dielectric layer over the conductive layer extending at least to the height of the isolation region, polishing the surface of the dielectric layer until the surface is planar and the top surface of the isolation region is exposed, and forming at least one patterned conductive layer over the surface of the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.