Method for forming a semiconductor fuse
US6261937A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1998 |
| Grant date | Jul 17, 2001 |
| Priority date | — |
| Expiry date | Jun 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor integrated circuit having a fuse and an active device. A dielectric layer is formed over the fuse and over a contract region of the active device. Via holes are formed through selected regions of the dielectric layer exposing underlying portions of the fuse and underlying portions of a contact region of the active device. An electrically conductive material is deposited over the dielectric layer and through the via holes onto exposed portions of the fuse and the contact region. Portions of the electrically conductive material deposited onto the fuse are selectively removed while leaving portions of the electrically conductive material deposited onto the contact region of the active device. A fill material is disposed in the one of the fuse, a bottom portion of such filling material being spaced from the fuse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.