Integrated circuit having double bottom anti-reflective coating layer
US6265294A · kind A · utility
4Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 1999 |
| Grant date | Jul 24, 2001 |
| Priority date | — |
| Expiry date | Aug 12, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method reduces the amount of discoloration on interlevel dielectric layers due to anti-reflective coatings (ARC). The invention utilizes a barrier layer, such as, silicon nitride (SiN) that prevents the anti-reflective coating from contacting the interlevel dielectric layer (ILD0). The anti-reflective coating can be silicon oxynitride (SiON) deposited by LPCVD or PECVD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.