Back lapping in-line system for semiconductor device fabrication
US6269281A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 1999 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Jan 21, 2019 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B7/228
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A back lapping in-line system for semiconductor device fabrication carries out a vinyl covering, a back side grinding, and a vinyl removing for grinding the back side of a wafer in-line with one single process. The back lapping in-line system has a server connected to a network line, a program therein for controlling the in-line processes, and an in-line facility connected to the server by a standard communication line, wherein parts of the in-line facility are assembled in order, and each part carries out its corresponding process according to information communicated to and from the server, and unloads the wafer after it passes through all of the corresponding processes successively. The in-line facility uses a single loading and unloading, and needs no storage space between parts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.