Method and apparatus for parallel routing locking mechanism
US6269469A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 1998 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Apr 17, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for implementing net routing for an integrated circuit design with parallel processors, said method comprising the steps of creating a character array, filling said character array with a first character, dividing a plurality of nets into groups, supplying a plurality of locks and assigning each said group its own individual lock, assigning for each net in said plurality of nets a position in the character array; and placing a second character in the position of a particular net in said character array when the net is operated on by a processor and replacing said second character with the first character after said operation is completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.