Substrate for accommodating warped semiconductor devices
US6271109A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2000 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Jul 21, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A substrate for solder ball assembling a semiconductor device substantially parallel onto said substrate, said device having a plurality of terminals arrayed on a warped surface, comprising an electrically insulating surface including a plurality of discrete metallic areas; said areas having locations matching the locations of said device terminals, and further being suitable for solder ball attachment in surface mount reflow operation; and said areas further having at least one characteristic suitable for accommodating said device warping in solder reflow operation, whereby areas having higher amounts of said characteristic cause said solder balls to become thinner during reflow, resulting in lower solder joint heights, relative to the heights of the remaining solder joints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.