Interlayer between titanium nitride and high density plasma oxide
US6271112A · kind A · utility
10Cited by
7References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1998 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Nov 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for reducing die loss in a semiconductor fabrication process which employs titanium nitride and HDP oxide is provided. In the fabrication of multilevel interconnect structures, there is a propensity for defect formation in a process in which titanium nitride and HDP oxide layers are in contact along the edge of a semiconductor substrate. A dielectric interlayer is provided which improves the interfacial properties between titanium nitride and HDP oxide and thereby reduces defects caused by delamination at the titanium nitride/HDP oxide interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.