Patent · US Expired

Direct build-up layer on an encapsulated die package

US6271469A · kind A · utility

597Cited by

14References

21Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Qing Ma · Saratoga, US
Chun Mu · Saratoga, US
Harry Fujimoto · Sunnyvale, US

Key dates

Filing date	Nov 12, 1999
Grant date	Aug 7, 2001
Priority date	—
Expiry date	Nov 12, 2019

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/351
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A microelectronic package including a microelectronic die having an active surface and at least one side. An encapsulation material is disposed adjacent the microelectronic die side(s), wherein the encapsulation material includes at least one surface substantially planar to the microelectronic die active surface. A first dielectric material layer may be disposed on at least a portion of the microelectronic die active surface and the encapsulation material surface. At least one conductive trace is then disposed on the first dielectric material layer. The conductive trace(s) is in electrical contact with the microelectronic die active surface. At least one conductive trace extends vertically adjacent the microelectronic die active surface and vertically adjacent the encapsulation material surface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.