Wire interconnect structure for electrically and mechanically connecting an integrated circuit chip to a substrate
US6271599A · kind A · utility
10Cited by
8References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1999 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Aug 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wire interconnect structure for electrically and mechanically connecting an integrated circuit chip to a substrate and a process for manufacturing the same. The wire interconnect structure comprises an insulator layer disposed on an integrated circuit chip and an electrically conductive post extending through the insulator layer to the integrated circuit chip. The post has an elongated body, a bottom at one end of the body which is mechanically and electrically connected to the integrated circuit chip, and a top having a spherical shape at the opposite end of the body which extends outward from the insulator layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.