Method of manufacturing shallow source/drain junctions in a salicide process
US6274445A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 3, 1999 |
| Grant date | Aug 14, 2001 |
| Priority date | — |
| Expiry date | Feb 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An ion implanting process allows for shallow source and drain junctions of the transistor. According to one example embodiment, a BARC layer is formed over a gate, and a poly-crystalline or amorphous silicon shield is deposited over the source and drain regions, then the BARC and silicon are chemically mechanically polished. The poly-crystalline or amorphous silicon shield absorbs the initial impact the dopant species of ion implantation and reduces the incidence of irreversible source/drain crystal damage caused by the process. After the ion implantation, the species implanted in the poly or amorphous silicon is diffused into the source/drain regions by annealing. An additional siliciding of the poly or amorphous silicon covering the source and drain minimizes the need for deeper source/drain junctions and hence improves short-channel properties.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.