Faran Nouri
14Patents
8h-index
13Co-inventors
65Inventor score
Filing activity: Oct 30, 1992 → Jul 26, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6221735A | Method for eliminating stress induced dislocations in CMOS devices | Electricity | 132 | Expired |
| US7413957B2 | Methods for forming a transistor | Electricity | 14 | Active |
| US6251747A | Use of an insulating spacer to prevent threshold voltage roll-off in narrow devices | Electricity | 12 | Expired |
| US6274445A | Method of manufacturing shallow source/drain junctions in a salicide process | Electricity | 10 | Expired |
| US5422510A | MOS transistor with non-uniform channel dopant profile | Electricity | 9 | Expired |
| US8105908B2 | Methods for forming a transistor and modulating channel stress | Electricity | 9 | Active |
| US6313011A | Method for suppressing narrow width effects in CMOS technology | Electricity | 8 | Expired |
| US7795124B2 | Methods for contact resistance reduction of advanced CMOS devices | Electricity | 8 | Active |
| US6235609A | Method for forming isolation areas with improved isolation oxide | Electricity | 6 | Expired |
| US7994015B2 | NMOS transistor devices and methods for fabricating same | Electricity | 1 | Active |
| US7569502B2 | Method of forming a silicon oxynitride layer | Electricity | 1 | Active |
| US7833869B2 | Methods for forming a transistor | Electricity | 0 | Active |
| US7968413B2 | Methods for forming a transistor | Electricity | 0 | Active |
| US8330225B2 | NMOS transistor devices and methods for fabricating same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.