Method of fabricating a gate-control electrode for an IGBT transistor
US6274451A · kind A · utility
2Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1999 |
| Grant date | Aug 14, 2001 |
| Priority date | — |
| Expiry date | Oct 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This method of fabricating a gate-control electrode (28) for an insulated-gate bipolar transistor, from a plate of electrically conducting material which is covered with an electrically insulating layer (22) and, on one of its large faces, delimits a connection pad intended to be soldered to the gate, includes the steps consisting in, on the pad, forming an electrically conductive layer (30) covering the electrically insulating layer (22), on the plate, forming an electrically conductive track for supplying the connection pad, and burying the supply track.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.