Process of manufacturing thin ball grid array substrates
US6274491A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2000 |
| Grant date | Aug 14, 2001 |
| Priority date | — |
| Expiry date | Aug 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0394
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process of manufacturing thin ball array substrates includes the steps of: using a layer of polyimide film as a carrier, electroplating a thin copper layer on the polyimide film, electroplating a thick copper layer on the thin copper layer, applying photosensitive coating layers on both sides of the carrier, mounting two masks with optically transmissible circuit tracks on two sides of the carrier and then processing the carrier with exposure treatment, processing the carrier with development treatment so as to remove the photosensitive coating layers aligned with the circuit track thereby forming recessed circuit tracks on the photosensitive coating layers, electroplating a copper layer on a top of the carrier thereby forming an additional copper layer on the thick copper layer, etching a bottom of the carrier to remove the upper recessed circuit track thereon, coating the copper layer on the upper recessed circuit track with soldering metallic material so as to make a top of the soldering metallic material, washing away the photosensitive coating layers with chemical agent, and removing surplus copper layer to remain in circuit lines and the soldering metallic material, whereby…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.