Semiconductor device having a shielding conductor
US6278148A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 1998 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Mar 18, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a semiconductor device that includes a dynamic memory and logic circuits that are integrated on a single chip and that can avoid noise problems and signal delay. The portion above the memory is shielded with a shielding conductor that is biased to an equipotential. Wirings between logical blocks and bonding pads or between logical blocks are passed over the conductive layer. Wiring for logic circuits can be done in the same metal wiring layer in which the shielding conductor is provided. The shielding conductor can have a mesh-like structure to improve its integrity and wirings can be passed over conductive portions of the shielding layer to be protected from noise. In addition to the dynamic memory, other memories and analog circuits can be used instead of or in combination with the dynamic memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.