Semiconductor device with gate insulator formed of high dielectric film
US6278164A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1997 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Dec 23, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0217
Abstract
A p-type silicon substrate has an element isolation region of an STI structure formed therein. A transistor region isolated by the isolation region has a n-type source/drain diffusion layer. Further, a p-channel impurity layer is formed substantially only in its channel region for controlling its threshold voltage (Vth). A gate insulator film consisting of a high dielectric film is formed on the channel region with an Si.sub.3 N.sub.4 film interposed therebetween. A metal gate electrode having its bottom and side surfaces covered with the gate insulator film is provided in a self-alignment manner with respect to the source/drain diffusion layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.