Stacked multi-chip modules using C4 interconnect technology having improved thermal management
US6278181A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 28, 1999 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Jun 28, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip-chip circuit arrangement having improved thermal management includes a base substrate having a top surface which includes one or more bond pads thereon. The arrangement further includes a semiconductor substrate having circuitry and one or more bond pads thereon, wherein the one or more bond pads on the semiconductor substrate correspond to the one or more bond pads on the base substrate. The semiconductor substrate has one or more channels which extend from a top surface to a bottom surface thereof and the channels facilitate a transfer of heat due to power dissipation of the circuitry away from the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.