High resolution speech synthesizer without interpolation circuit
US6278974A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 21, 1997 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Nov 21, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L13/047
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is related to a speech synthesizer which includes a sampled signal storing device storing therein a sampled signal and outputting the sampled signal in response to an input signal, and a speech signal synthesizing circuit electrically connected to the sampled signal storing device, receiving an operation signal, having the sampled signal outputted by the sampled signal storing device be repeatedly operated in response to the operation signal, and then outputting a speech synthesized signal, wherein a frequency of the operation signal is higher than that of the input signal to allow the sampled signal to be repeatedly operated during a single cycle of the input signal. The present invention proceeds a plurality of times of operation for each entry of data in the storing device so that the synthesizing performance of the present synthesizer can be improved without increasing the storage amount of the sampled signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.