Fault resilient/fault tolerant computing
US6279119A · kind A · utility
49Cited by
16References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1998 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Nov 13, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1687
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fault tolerant/fault resilient computer system includes at least two compute elements connected to at least one controller. Each compute element has clocks that operate asynchronously to clocks of the other compute elements. The compute elements operate in a first mode in which the compute elements each execute a first stream of instructions in emulated clock lockstep, and in a second mode in which the compute elements each execute a second stream of instructions in instruction lockstep. Each compute element may be a multi-processor compute element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.