Substrate for mounting semiconductor chips
US6281450A · kind A · utility
143Cited by
31References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1999 |
| Grant date | Aug 28, 2001 |
| Priority date | — |
| Expiry date | Dec 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10674
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate for mounting a semiconductor chip having bumps using an adhesive thereon, said substrate being, for instance, provided with an insulating coating having an opening in the semiconductor chip mounting area so that the wiring conductors will not be exposed to the substrate surface near the boundary of the semiconductor chip mounting area, is improved in connection reliability and has high mass productivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.