High-performance interconnect

US6281704A · kind A · utility

Assignee

• Altera Corporation · US

Inventors

• Tony Ngai · Campbell, US
• Sergey Shumarayev · Los Altos Hills, US
• Sammy Cheung · Pleasanton, US
• Rakesh Patel · Cupertino, US
• Vinson Chan · San Jose, US

Key dates

• Filing date: Mar 15, 2001
• Grant date: Aug 28, 2001
• Expiry date: Mar 15, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

Techniques for providing high-performance interconnect for integrated circuits will improve overall integrated circuit performance. These techniques include arranging, laying out, and fabricating the signal conductors (e.g., 405, 720) so the parasitic coupling capacitances (e.g., 425) are minimized and parasitic resistance is reduced. The techniques will minimize effects of crosstalk noise between the conductors, and thus improve overall integrated circuit performance.