Manufacturing method of a semiconductor device
US6284638A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 7, 1999 |
| Grant date | Sep 4, 2001 |
| Priority date | — |
| Expiry date | Sep 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a semiconductor device including an insulated-gate field effect transistor having a contact hole formed in an inter-layer insulating film on an S/D region adjacent to a gate electrode and has an object to provide a semiconductor device capable of securing the uniformity of the thickness of an insulating film between a gate electrode and an S/D electrode or interconnection layer while integrating elements at a high density. The semiconductor device comprises an S/D region formed in a semiconductor layer at the both sides of the gate electrode, an insulating side wall formed on side surface of the gate electrode, a conducting side wall covering side surface of the insulating side wall and contacting the S/D region, a covering insulating film for covering the gate electrode, S/D region, insulating side wall, and conducting side wall, and a contact hole formed in the covering insulating film on the S/D region of at least one side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.