Method and apparatus for generating clock signals
US6288589A · kind A · utility
18Cited by
14References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1998 |
| Grant date | Sep 11, 2001 |
| Priority date | — |
| Expiry date | Oct 27, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention comprises a master global clock distributed in a low-skew manner over a relevant clock domain area coupled with a plurality of locally generated clocks in said clock domain area. The plurality of locally generated clocks are tuned to allow for skew and jitter tolerance. The present invention further comprises embodiments with 3, 4, 5, and 6 locally generated clocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.