Method of making semiconductor chip package
US6291271A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1999 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | Nov 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a semiconductor chip package utilizes a film carrier to support a semiconductor chip. The method comprises the steps of: forming a plurality of through-holes in a film carrier; laminating a metal layer on the film carrier; etching the metal layer to form a die pad and a plurality of connection pads disposed corresponding to the through-holes; forming a metal coating on the surfaces of the die pad and the connection pads which are not covered by the film carrier; attaching a semiconductor chip to the die pad; electrically coupling the semiconductor chip to the connection pads; forming a package body over the film carrier and the semiconductor chip; and removing the film carrier. Since the method of making a chip package in accordance with the present invention utilizes a low cost film carrier to support the chip during the assembly process and the film carrier can be directly removed to expose the bottom of the chip and the connection pads, the method is simple, cost-saving, time-saving and provides the chip with better thermal-performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.