Lateral patterning
US6291353A · kind A · utility
7Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1999 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | Aug 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure for forming an integrated circuit chip having at least one opening in a substrate includes forming an opening having vertical walls in the substrate, protecting a first portion of the vertical walls of the opening, leaving a second portion of the vertical walls unprotected, and laterally patterning the second portion of the opening to change a shape or property of the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.