Circuit and method for reducing voltage oscillations on a digital integrated circuit
US6292049A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2000 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | Mar 24, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/163
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit and method for reducing voltage oscillations at the output leads of a digital integrated circuit. A circuit for reducing voltage oscillations on the output leads of a digital integrated circuit comprising a positive voltage charge pump unit coupled to an output driver, a negative voltage charge pump unit also coupled to the output driver and a sense and control unit coupled to both the negative voltage charge pump unit and the positive voltage charge pump unit is presented. The sense and control unit is configured to determine whether switching current is present in the source or drain of the output driver. If switching current is present in the source, then the sense and control unit is further configured to connect the positive voltage charge pump unit to the source. If switching current is present in the drain, then the sense and control unit is still further configured to connect the negative voltage charge pump unit to the drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.