Semiconductor integrated circuit device having an improved operation control for a dynamic memory
US6301184A · kind A · utility
19Cited by
2References
11Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jan 11, 2000 |
| Grant date | Oct 9, 2001 |
| Priority date | — |
| Expiry date | Jan 11, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A DRAM module is applied to the system LSI which is provided with a standby mode for suppressing the whole operation thereof and an operation standby mode which permits at least the DRAM module to operate but suppresses the operation of other circuits. The above-mentioned modes as well as a substrate bias control technology are applied to the CMOS system LSI that operates on a low voltage. The system LSI is controlled to hold or not to hold data, enabling a memory of a large capacity to be mounted and consuming a sufficiently decreased amount of electric power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.