Resistively heated single wafer furnace
US6303906A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 1999 |
| Grant date | Oct 16, 2001 |
| Priority date | — |
| Expiry date | Nov 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67109
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A heating apparatus and method for isothermally distributing a temperature across the surface of a semiconductor device during processing. Specifically, a chamber is provided defining a cavity, which is configured to receive a single semiconductor wafer. A plurality of resistive heating elements are provided and advantageously arranged in the cavity. The heating elements are disposed across the chamber and are aligned in close proximity to one another so as to provide an even heating temperature distribution. In accordance with the present invention, the cavity is divided into heating zones. The resistive heating elements are each individually assigned to a zone and are independently controllable. By individually varying the amount of energy emanating from each resistive heating element, an isothermal temperature distribution may be generated across each zone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.