Semiconductor memory device having driver and load MISFETs and capacitor elements
US6307217A · kind A · utility
7Cited by
14References
36Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jan 14, 1994 |
| Grant date | Oct 23, 2001 |
| Priority date | — |
| Expiry date | Jan 14, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
Abstract
A static random access memory comprising memory cells each composed of transfer MISFETs controlled by word lines and of a flip-flop circuit made of driver MISFETs and load MISFETs. The top of the load MISFETs is covered with supply voltage lines so that capacitor elements of a stacked structure are formed between the gate electrodes of the load MISFETs and the supply voltage lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.