Semiconductor device
US6307245A · kind A · utility
12Cited by
2References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2000 |
| Grant date | Oct 23, 2001 |
| Priority date | — |
| Expiry date | Jan 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of producing a semiconductor device includes a semiconductor substrate and a gate embedding layer. A pair of side walls made of insulating layers having a width are formed on the inner surface of a first opening and the gate embedding layer is formed by using the pair of side walls and a first insulating layer as masks so that the embedded portion and the first extending portion are self-aligned and, consequently, the first extending portion is symmetrical with respect to the embedded portion. Accordingly, the first extending portion of the gate electrode is offset toward the drain electrode or source electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.