Method for synthesis of common-case optimized circuits to improve performance and power dissipation
US6308313A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1999 |
| Grant date | Oct 23, 2001 |
| Priority date | — |
| Expiry date | Jun 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing a circuit with reduced power consumption using a Common-Case Computation (CCC) based design. The method comprising identifying a set of common case computations from a schedule of the circuit, designing add on common detection circuit that detects the set of common case computations, designing add on common case execution circuit that executes the set of common case computations; and integrating the add on circuitry with the original circuit. A circuit design system for optimizing a circuit for power management comprising: a simulator for simulating a schedule with input traces based on a given RTL design, schedule and typical input traces; a state sequence identifier for identifying promising state sequence patterns from simulated schedules; a behavior extractor for extracting behavior corresponding to each identified state sequences; a pattern selector for choosing a best pattern; a synthesizer for synthesizing common case circuitry; and an output generator for integrating common case circuitry with an original circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.