Apparatus and method for changing processor clock ratio settings
US6311281A · kind A · utility
18Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 2, 1999 |
| Grant date | Oct 30, 2001 |
| Priority date | — |
| Expiry date | Mar 2, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A processor has an external pin that can be asserted to lock in new clock ratio information dynamically. A state machine of the processor defines a stop grant state that is utilized to halt the internal clocking signal of the processor. A storage location, such as a register, is utilized to load new clock frequency information into the clock generator circuit of the processor. De-asserting the external pin of the processor causes the processor to resume normal operations, but at the newly set clock frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.