Method of equalizing device heights on a chip
US6316286A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 1, 2000 |
| Grant date | Nov 13, 2001 |
| Priority date | — |
| Expiry date | Sep 1, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/16225
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of equalizing device heights on a chip includes providing on a first chip an array of first devices having a predetermined height including dummy devices with bonding bumps; engaging the bonding bumps on the first chip with those on the second chip; removing the dummy devices to create holes containing the double bumps previously associated with the dummy devices; providing on a third chip an array of second devices having a lower height than the first devices with bonding bumps which match those in the holes; and bump bonding the third chip to the second chip with the second devices in the holes and the bonding bumps on the second devices combining with the multiple bumps in the holes to equalize the height of the first and second devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.