Trench semiconductor device manufacture with a thicker upper insulating layer

US6319777A · kind A · utility

Assignee

• KONINKLIJKE PHILIPS ELECTRONICS NV · NL

Inventors

• Raymond J. E. Hueting · Helmond, NL
• Cornelis Eustatius Timmering · Eindhoven, NL
• Henricus Godefridus Rafael Maas · Eindhoven, NL

Key dates

• Filing date: Apr 24, 2001
• Grant date: Nov 20, 2001
• Expiry date: Apr 24, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/254

Abstract

In the manufacture of semiconductor devices that have an electrode (11,41) in an insulated trench (20), for example a trench-gate MOSFET, process steps are performed to line the trench walls with a lower insulating layer (21) in a lower part of the trench and with a thicker upper insulating layer (22) in an upper part of the trench. The steps include: (a) etching the trench (20); (b) providing the lower insulating layer (21) on the trench walls; (c) depositing on the lower insulating layer (21) a further layer (51) of a different material; (d) depositing on the further layer (51) a filler material (52) that is of a different material from the further layer (51); (e) etching away the further layer (51) from the upper part of the trench walls while using the filler material (52) as an etchant mask, so as to form a space (50) adjacent to the upper part of the trench walls while leaving the further layer (51) in the lower part of the trench; and (f) providing the thicker upper insulating layer (22) in the space (50) adjacent to the upper part of the trench walls.