Fully dry post-via-etch cleaning method for a damascene process
US6323121A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2000 |
| Grant date | Nov 27, 2001 |
| Priority date | — |
| Expiry date | May 12, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76807
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is described for cleaning freshly etched dual damascene via openings and preparing them for copper fill without damage or contamination of exposed organic or other porous low-k insulative layers. The method is entirely dry and does not expose the porous materials to contamination from moisture or solvents. The method is effective for removing all traces of residual polymer deposits from an in-process substrate wafers after via or damascene trench etching. The method employs an in-situ three-step treatment comprising a first step of exposing the electrically biased substrate wafer to a O.sub.2 /N.sub.2 ashing plasma to remove photoresist and polymers, a second step immediately following the first step of remove silicon nitride etch stop layers, and a final step of treating the wafer with H.sub.2 /N.sub.2 to remove copper polymer deposits formed during nitride removal. The H.sub.2 /N.sub.2 plasma is capable of removing the difficult polymer residues which are otherwise only removable by wet stripping procedures. The H.sub.2 /N.sub.2 plasma is not harmful to exposed porous low-k dielectric layers as well as copper metallurgy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.