Self-aligned silicon carbide LMOSFET
US6323506A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 21, 1999 |
| Grant date | Nov 27, 2001 |
| Priority date | — |
| Expiry date | Dec 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/256
Abstract
A lateral metal-oxide-semiconductor field effect transistor (LMOSFET) having a self-aligned gate, includes a first layer of SiC semiconductor material having a p-type conductivity, and a second layer of SiC semiconductor material having an n-type conductivity formed on the first layer. Source and drain regions having n-type conductivities are formed in the second SiC semiconductor layer. The n-type conductivities of the source and drain regions are greater than the n-type conductivity of the second SiC layer. A trench extends through the second SiC semiconductor layer and partially into the first SiC semiconductor layer. The trench is coated with a layer of an electrically insulating oxide material and partially filled with a layer of metallic material. The layers of oxide and metallic material form a gate structure. A channel region is defined in the first layer beneath the gate structure, and electrical contacts associated with the source and drain regions, and the gate structure, establish source, drain, and gate electrodes of the LMOSFET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.