Patent · US Expired

System and method for dispatching groups of instructions using pipelined register renaming

US6324640A · kind A · utility

14Cited by

7References

14Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Hung Q. Le · Austin, US
Hoichi Cheong · Austin, US

Key dates

Filing date	Jun 30, 1998
Grant date	Nov 27, 2001
Priority date	—
Expiry date	Jun 30, 2018

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/38585
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Within a superscalar processor, multiple groups of instructions are dispatched simultaneously to a plurality of execution units. A renaming mechanism is utilized to permit out-of-order execution of these instructions within the multiple groups. The renaming mechanism includes a rename table allocated for each dispatched group. A delay register is implemented between a portion of the dispatch queue dispatching a second one of the groups of instructions and a second one of the rename tables.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.