DTCMOS circuit having improved speed

US6326666A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Kerry Bernstein · Underhill, US
• Norman J. Rohrer · Underhill, US

Key dates

• Filing date: Mar 23, 2000
• Grant date: Dec 4, 2001
• Expiry date: Mar 23, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/201

Abstract

A DTCMOS circuit produces an output based on a logical combination of input logic signals. The circuit includes input transistors which receive on a respective gate a respective logic signal. The transistors have a body contact which is connected to the gate of another transistor. Transistors which are receiving later arriving logic signals therefore have a threshold voltage lowered by an earlier arriving logic signal. By coupling the earlier arriving logic signal with a body contact of another input transistor, the threshold voltage may be lowered prior to processing of the subsequently arriving logic signal. The DTCMOS circuit may be implemented in SOI with the attendant benefits of a lower supply made possible by the lowered voltage threshold each of the transistors without sacrificing leakage current inherent in DTCMOS circuits.