Flexible placement of serial data within a time divisioned multiplexed frame through programmable time slot start and stop bit positions
US6327259A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 1998 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Jun 1, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/1682
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A microcontroller is provided with one or more synchronous serial channels, such as HDLC channels, that are coupled to time slot assigners for communication over a time division multiplex bus. The time slot assigners each include a bit position start register and a bit position stop register that allows the time slot assigner to enable and disable the associated synchronous serial channel on the arrival of a specific bit position within the time division multiplex bus frame. Further, an end of slot adjust register provides for additional bits to be placed by the time slot assigner on to the end of a slot that is transmitted by an associated synchronous serial communication channel transmitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.