Method of fabricating a memory device having a long data retention time with the increase in leakage current suppressed
US6329238A · kind A · utility
1Cited by
5References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2000 |
| Grant date | Dec 11, 2001 |
| Priority date | — |
| Expiry date | Nov 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/05
Abstract
In a semiconductor memory device such as a DRAM, a conductive film is arranged on the rim portion of a isolation insulating film in opposition to a semiconductor substrate with a thin insulating film in between. This conductive film is electrically connected to a lower electrode of a storage capacitor. This novel arrangement can control the location of electrical pn junction independently of the location of metallurgical pn junction, thereby realizing a semiconductor memory device having a long data retention time with the increase in leakage current suppressed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.