System and method for maximizing DMA transfers of arbitrarily aligned data
US6330623A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 1999 |
| Grant date | Dec 11, 2001 |
| Priority date | — |
| Expiry date | Jan 8, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A direct memory access engine (DMA) system and method for maximizing DMA transfers of arbitrarily aligned data. The present invention utilizes physical region descriptors (PRD) stored in memory to track locations and descriptions of scattered data in a main memory. The direct memory access circuit retrieves the data in accordance with the PRD and configures the data into pieces such that intermediate pieces of data between a first piece and a last piece are the maximum amount of information a communication burst is capable of transferring and the intermediate pieces of data are aligned to a natural boundary address. The DMA engine also communicates the first piece of data and the last piece of data in a manner that minimizes memory accesses and in transfer sizes that are compatible with requirements and limitations of a system in which DMA engine is implemented. The DMA rotates bytes of the data to compensate for misalignment between a source address and a destination address and merges the data into a concatenated stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.