Formation of integrated circuit structure using one or more silicon layers for implantation and out-diffusion in formation of defect-free source/drain regions and also for subsequent formation of silicon nitride spacers
US6331468A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 1998 |
| Grant date | Dec 18, 2001 |
| Priority date | — |
| Expiry date | May 11, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process is described for using a silicon layer as an implant and out-diffusion layer, for forming defect-free source/drain regions in a semiconductor substrate, and also for subsequent formation of silicon nitride spacers. A nitrogen-containing dopant barrier layer is first formed over a single crystal semiconductor substrate by nitridating either a previously formed gate oxide layer, or a silicon layer formed over the gate oxide layer, to form a barrier layer comprising either a silicon, oxygen, and nitrogen compound or a compound of silicon and nitrogen. The nitridating may be carried out using a nitrogen plasma followed by an anneal. A polysilicon gate electrode is then formed over this barrier layer, and the exposed portions of the barrier layer remaining are removed. An amorphous silicon layer of predetermined thickness is then formed over the substrate and polysilicon gate electrode. This amorphous layer is then implanted with a dopant capable of forming a source/drain region in the underlying silicon substrate by subsequent diffusion of the implanted dopant from the amorphous silicon layer into the substrate. The structure is then annealed to diffuse the dopant from the im…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.